Student Research Symposium

Message from the Chairs  [PDF, 93 kB]

HiPC 2012 will feature the fifth student research symposium on High Performance Computing (HPC) aimed at stimulating and fostering student research, and providing an international forum to highlight student research accomplishments. The symposium will also expose students to the best practices in HPC in academia and industry. The one-day symposium will feature brief presentations by student authors on their research, followed by a poster exhibit. Short invited talks by leading HPC researchers/ practitioners will be included in the program. The Conference Reception and Student Symposium Poster Exhibits will provide an opportunity for students to interact with HPC researchers and practitioners (and recruiters) from academia and industry. For additional details, please contact the Symposium Co-Chairs.

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Upcoming Important Dates

August 1, 2012 - Submission Opens
September 23, 2012 - Submission Deadline
October 21, 2012 - Accept/Reject Decision Notification
December 18, 2012 - Student Symposium


The research work presented in the submission should primarily be the result of student research. Accepted papers and posters should be presented by a student author. The student author should have been a full-time student at some point in 2012. Non-student co-authors are permitted.

Abstract Submission

The extended abstracts should be submitted in PDF format. The document should be at most 5 letter size (8.5in x 11in) pages in 11 pt or 12 pt font, single spaced, with at least one-inch margins on all sides. Please identify the names of student authors in a footnote. If some part of your submission was published by you previously, then you should cite your prior work and indicate how the current submission differs from it.

Submissions will be handled electronically at: Please create an account there, if you do not have one already, login, and follow submission instructions.

The selected extended abstracts will be published online on the conference web site and on a CD to be distributed at the conference. They will not be part of the official HiPC conference proceedings.

Selection will be competitive and all submissions will be reviewed. Manuscripts will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the conference attendees.


All topics relevant to the HiPC conference are of interest to this symposium.

Topics of interest include but are not limited to:

  • High-Performance Computing
  • Parallel and Distributed Algorithms/Systems
  • Parallel Languages and Programming Environments
  • Hybrid Parallel Programming with GPUs and Accelerators
  • Load Balancing, Scheduling and Resource Management
  • Resilient/Fault-Tolerant Algorithms and Systems
  • Scientific/Engineering/Commercial Applications and Workloads
  • Emerging Applications such as Biotechnology and Nanotechnology
  • Cluster, Cloud, and Grid Computing
  • Heterogeneous Computing
  • Interconnection Networks and Architectures
  • Scalable Servers and Systems
  • High Performance/Scalable Storage Systems
  • Power-Efficient and Reconfigurable Architectures
  • Compiler Technologies for High-Performance Computing
  • Software Support and Advanced Micro-architecture Techniques
  • Operating Systems for Scalable High-Performance Computing

Awards and Scholarships

Awards for Best Poster and Best Presentation will be presented at the symposium. We expect a total of INR 50,000 for the awards from the IEEE Technical Committee on Parallel Processing.

Students from Indian academic institutions are encouraged to apply for the HiPC travel scholarship. The conference expects to award travel scholarship to at least one student author of each accepted submission from Indian academic institutions who apply. In addition, highly motivated students who wish to attend the conference but do not have a submission, may also apply for these scholarships. Details on applying will be announced later.

A book containing the resumes of the students participating in the symposium will be compiled and made available to the sponsors of the HiPC 2012 conference.

Student Research Symposium Co-Chairs

  • Yogesh Simmhan, University of Southern California, USA
  • Ashok Srinivasan, Florida State University, USA

Student Research Symposium Coordinator

  • Kishore Kothappalli, IIIT Hyderabad

Contact student_symposium at hipc dot org for more details.

Talks by Experts

Professional Opportunities in High Performance Computing in India
Pradeep K. Sinha
Senior Director (HPC), C-DAC

Abstract: High Performance Computing (HPC) plays an important role in both scientific advancement and economic competitiveness of a nation because it is a powerful tool for accelerating a nation's R&D programs by increasing the productivity of scientists and researchers. It enables scientists and researchers to produce scientific and industrial solutions faster, less expensively, and with higher quality than traditional theory and experimentation alone. HPC, therefore, is seen as a powerful tool of a nation to compete with other nations. This is exactly the reason why today many nations are vying for HPC leadership.

HPC has gradually evolved as a domain with ample professional opportunities. Today, many students see HPC as an area to pursue their professional career. HPC being a multi-disciplinary domain offers career opportunities not only to students with computer science and engineering background, but also to students specializing in any branch of engineering or science. As the scale of HPC systems and applications grows, the need for HPC aware skilled manpower will also grow providing more and more job opportunities in future. India started its HPC programs in late 1980s and has since then developed various indigenous HPC capabilities. Today, India possesses a wealth of HPC- related experiences and expertise including hardware, system software, application software, system operation & management and many more. The talk will focus on the various types of skills required for a country to successfully drive its HPC programs. It will then deal with the various types of professional opportunities available in India in the field of HPC for those willing to be part of India's future HPC programs.

Bio: Dr. Pradeep K. Sinha led national programs in the areas of High Performance Computing, Grid Computing, and Health Informatics. Before joining C-DAC in 1996, Dr. Sinha was with Multimedia Systems Research Laboratory of Panasonic in Tokyo, Japan. At C-DAC, Dr. Sinha has been deeply involved in the design and development of PARAM series of supercomputers. He was also instrumental in the setup and operation of C-DAC's National PARAM Supercomputing Facility (NPSF) at Pune, the Terascale Supercomputing Facility (CTSF) at Bangalore, and the National Grid Garuda infrastructure. Dr. Sinha is currently leading the HPC team at C-DAC to build yet more powerful and usable supercomputers in India. He hold two internationalpatents and has authored a number of technical papers and six books. Dr. Sinha recently received the recognition of "ACM Distinguished Engineer" from the Association for Computing Machinery for significant accomplishments in, and impact on, the computing field.

Accepted Papers

Hardware Co-Simulation of Skin Burn Image Analysis [PDF]
Deepak L*, NITK Surathkal; Joseph Antony, NITK Surathkal; Niranjan U C, MDN Labs

Online backup and versioning in log-structured file systems [PDF]
Ravi Tandon*, Indian Institute of Technology

Performance estimation and application mapping on different GPUs [PDF]
Arun Parakh*, IIT Delhi

Hybrid Multi-Core Algorithms for Regular Image Filtering Applications [PDF]
Shrenik Lad, IIIT Hyderabad; Krishna Kumar Singh, IIIT Hyderabad; Kishore Kothapalli*, IIIT Hyderabad; P.J. Narayanan, IIIT Hyderabad

Mapping Streaming Applications to OpenCL [PDF]
Abhishek Ray*, Nanyang Technological Univ

Priority Based Dynamic resource allocation in Cloud Computing [PDF]

Aspect-Oriented Tool For Memory And Performance Profiling [PDF]
Ankit Agarwal*, IIT Rajasthan; Shivanjali Kamble, IIT Rajasthan

A Power-Performance Analysis of Memory-intensive Parallel Applications on a Manycore Platform [PDF]
Vishal Gupta*, Georgia Tech, Atlanta; Hyesoon Kim, Georgia Tech; Karsten Schwan, Georgia Tech

A computationally efficient and scalable approach for privacy preserving kNN classification [PDF]
Sairam Ravu*, SSSIHL; Neelakandan Ramachandran, SSSIHL; Mohan Gorai, ; Ravi Mukkamala, Old Dominion University, USA.; Pallav Baruah, SSSIHL

GPU implementation of epidemiological behaviour in large social networks [PDF]
Sairam Menon*, SSSIHL; Pallav Baruah, SSSIHL; Matija Sosic, Faculty of Electrical Engineering and Computing, Zagreb, Croatia

A Computationally Efficient Parallel Kernel Regression for Image Reconstruction [PDF]
V Sai Ram*, SSSIHL; M Srinivasa Rao, SSSIHL ; G. Dada Khalandhar, SSSIHL; L Srikanth, SSSIHL; Pallav Baruah, SSSIHL; R R sarma, SSSIHL

GenCodex - A Novel Algorithm for Compressing DNA sequences on Multi-cores and GPUs [PDF]
Satyanvesh D*, SSS Institute of Higher Learning; Kaliuday Balleda, SSS Institute of Higher Learning; Ajith Padyana, SSS Institute of Higher Learning; Pallav Baruah, SSSIHL

Employing GPU Accelerators for Efficient Enforcement of Data Integrity in Outsourced Data [PDF]
KRISHNA PRASANTH R*, SSSIHL; ravi Mukkamala, Old Dominion University, USA.; Pallav Baruah, SSSIHL

VMFS Backup and Recovery from Storage Controllers [PDF]
Deepti Banka*, NetApp; Prashasti Baid, ; Pallav Dhobley, ; Chhavi Sharma, ; Anurag Singh, ; Shivangi Singh, ; Giridhar Appaji Nag Yasa, NetApp India Pvt. Ltd.

FIELA: A Fast Image Encryption with Lorenz Attractor using Hybrid Computing [PDF]
Nagendra Prasad Behara V, SSSIHL; Kranthi Kumar*, SSSIHL; Gelli MBSS Kumar, SSSIHL; V. Chandrasekaran, SSSIHL; Pallav Baruah, SSSIHL

Parallel Cosegmentation via Submodular Optimization on Anisotropic Diffusion [PDF]
Aditya Prakash, SSSIHL; Dinesh Majeti*, SSSIHL; Balasubramanian S, SSSIHL; Pallav Baruah, SSSIHL

gR: A GPU-based Router [PDF]
Priya Sundaresan*, Anna University; Sripriya Venkateshprasad, Anna University; Yamini Muralitharan, Anna University; Ranjani Parthasarathi, Anna University

Accepted Posters

Automatic Parallelization of LLVM IR
Neelima Bayyapu

MapReduce Model of Multi Colony Ant System for Clustering Gene Expression Data
Bhavani Rajasekaran*, PSG College of Technology; G Sudha Sadasivam, PSG College of Technology; B.V. Ananth Janakiram , PSG College of Technology

Paralleling Synthetic Aperture Radar (SAR) Imaging for High Performance Computing on GPU
Vishal Mehta*, Nirma Institute of technology; Nagendra Gajjar, Nirma Institute of Science and technology

Partial Implementation of Hybrid MD5-Blowfish Algorithm in Kernel Space on the GPU Using CUDA
JAYA SREEVALSAN-NAIR*, IIIT Bangalore; Krishna Prasad BV, IIIT Bangalore; Nitesh Kumar, IIIT Bangalore; Sapan Agrawal, IIIT Bangalore; Harshad Gangakhedkar, IIIT Bangalore

Implementing VSP in Multicore Processors for Enhanced Energy Savings
Vijayalakshmi Saravanan*, Ryerson ; Sai Krishna P, IIT, Guwahati

Flight Search Optimisation using Hashing
Pathirage Samya Dimithrie*, University of Moratuwa, SL; Gihan Dias, University of Moraruwa,Sri Lanka

A Parallel Algorithm for Web Service Selection in High Performance Distributed Computing Environments and Evaluation of Dynamic Changes


MR-API: A Comprehensive API Framework for Heterogeneous Multi-core Systems using Map Reduce Programming Model
Prashanth Thinakaran*, Anna University; Srinivas Avireddy, Anna University; Prasanna Ranganathan, Anna University

Performance Optimization of Ontology Based Classification of Web Pages
Sampath Kumar*, SSSIHL; Nagendra Varma, SSSIHL; Vamsi Magatapalli, SSSIHL; Pallav Baruah, SSSIHL; Srivarun Vallampatla, SSSIHL

A Novel Approach to Enhance Block Reliability with Reduced Storage Requirement
Gopika Rani*, Psg college of technology

A Parallel Implementation of Missing Data Prediction using Principal Component Analysis
ARKA GHOSH*, SSSIHL; Sai Krishna, SSSIHL; V. Chandrasekaran, SSSIHL; Ajith Padyana, SSS Institute of Higher Learning

Performance and Energy-aware VM Management of Co-located LTE BS on Multicore Server Platforms
Madhurima Pore*, Arizona State University; Zahra Abbasi, Arizona State University; SAyan Kole, Arizona State University; Georgios Varsamopoulos, Arizona State University; Sandeep K. S Gupta, Arizona State University

Program Committee

Abhinav Vishnu, PNNL
Amit Majumdar, SDSC
Ashok Srinivasan, Florida State University
Joseph Zambreno, Iowa State
Kalyan Perumalla, ORNL
Kamesh Madduri, Penn State
Kishore Kothapalli, IIIT Hyderabad
Nitin Auluck, IIT Ropar
Parimala Thulasiraman, Manitoba
Pavanakumar Mohanamuraly, National Aerospace Laboratories
Rajendra Boppana, UT San Antonio
Ramesh Thirumale, Decisive Analytics Corporation
Ranjani Parthasarathy, Anna Univ
Satish Vadhiyar, IISc
Subhash Saini, NASA
Sudheer Kumar, SSSIHL
Surendra Byna, LBL
Suresh Marru, Indiana Univ
Sushmita Ruj, University of Ottawa
Venkatesh Choppella, IIIT-H
Vikram Sorathia, USC
Wei Lu, Microsoft Research
Xin Yuan, FSU
Yogesh Simmhan, University of Southern California


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